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R&D Engineer – Wireless Communication

All, Software/SaaS

Los Angeles, CA

Location: Los Angeles, CA | Schedule: Full-time, hybrid (minimum 3 days onsite per week, on-site days are Mondays, Wednesdays, and Thursdays) | Compensation: $100,000—$130,000 USD

Overview

A technology-driven engineering organization is seeking a full-time R&D Engineer to join its R&D Engineering team, reporting to the Director of R&D Engineering. This role will contribute to the design, simulation, prototyping, and testing of wireless communication and sensing projects and products, playing a key part in advancing the company's engineering capabilities.

What you'll do

  • Architect testbenches for full-system HDL simulations
  • Maintain and improve existing HDL testing infrastructure
  • Automate certain testing using scripts
  • Collect, maintain, and use code coverage data from test suites
  • Design and code HDL blocks
  • Perform hardware verification and troubleshooting, including familiarity with logic analyzers

Required qualifications

  • Bachelor of Science degree in Electrical Engineering, Computer Science, or relevant field plus 4 years of demonstrated experience in FPGA design and testing/verification, OR 2 years of FPGA experience in design and testing/verification with an MS or advanced degree
  • Proven experience with multiple clock-domain, high-utilization FPGA designs
  • Experience with Xilinx FPGAs, SoCs, and the Vivado IDE
  • Experience with tcl or python

Preferred qualifications

  • Master of Science degree in Electrical Engineering (MSEE)
  • Demonstrated experience with fixed point binary arithmetic and digital signal processing designs
  • Basic MATLAB skill
  • Experience with communication systems on FPGA or ASIC designs

Compensation and benefits

  • CA pay range: $100,000—$130,000 USD (based on market research and peer data; actual pay will vary depending on candidate experience and qualifications)

Why this role

This is an opportunity to work hands-on with wireless communication and sensing technologies, contributing directly to FPGA design, testing, and verification within an established R&D Engineering team.

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