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Overview

A technology company is seeking a full-time R&D Engineer to join its R&D Engineering team, reporting to the Director of R&D Engineering. This role focuses on the design, simulation, prototyping, and testing of wireless communication and sensing products. The position is based in Los Angeles, CA, on a hybrid schedule requiring a minimum of 3 days onsite per week (Mondays, Wednesdays, and Thursdays).

What you'll do

• Architect testbenches for full-system HDL simulations
• Maintain and improve existing HDL testing infrastructure
• Automate testing processes using scripts
• Collect, maintain, and use code coverage data from test suites
• Design and code HDL blocks
• Perform hardware verification and troubleshooting, including use of logic analyzers

What you'll need

• Bachelor of Science degree in Electrical Engineering, Computer Science, or a relevant field plus 4 years of demonstrated experience in FPGA design and testing/verification, OR 2 years of FPGA design and testing/verification experience with an MS or advanced degree
• Proven experience with multiple clock-domain, high-utilization FPGA designs
• Experience with Xilinx FPGAs, SoCs, and the Vivado IDE
• Experience with tcl or python
• Preferred: Master of Science degree in Electrical Engineering (MSEE)
• Preferred: demonstrated experience with fixed point binary arithmetic and digital signal processing designs
• Preferred: basic MATLAB skill
• Preferred: experience with communication systems on FPGA or ASIC designs

Compensation and benefits

• CA pay range: $100,000–$130,000 USD (based on market research and peer data; will vary depending on candidate's experience and qualifications)

Why this role

This is an opportunity to work hands-on with FPGA design, HDL simulation, and hardware verification on wireless communication and sensing products within an established R&D Engineering team.